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HP Announces The PA-8000 And PA-8000 Based Workstations

Antonio Castro

(The following is condensed from "The HP Technical Computing Systems Performance Brief," May, 1996)

Hewlett-Packard has announced the new PA-8000, the first processor to implement the 64-bit PA 2.0 architecture. The PA-8000 provides an out-of-order execution capability with a four-way superscalar design that enables it to examine 56 instructions at a time and determine which instructions to execute at the next clock cycle. It can issue up to four commands simultaneously. This, combined with 10 instruction execution units allows the PA-8000 to extract considerable instruction level parallelism. The high clock rate also contributes to a significant increase in performance.

The PA-8000 is fabricated using a 0.5 micron, 3.3V complementary metal-oxide semiconductor (CMOS) process and provides full 64-bit functionality. It is also fully binary compatible with existing PA-RISC application binaries.

HP also announced a family of Visualize Graphics Workstations based on the PA-8000. These include the C160, C180-X, K260-EG, K460-EG and K460-XP workstations. The table below lists some of the SPEC numbers for these systems.

System            Clock            SPEC            SPEC            Cache
                                   int95           fp95            (Instr/Data)

C160            160 MHz            10.4            16.3            512KB/512KB
C180-XP         180 MHz            11.8            18.7            1MB/1MB
K260-EG         180 MHz            11.8            19.4            1MB/1MB
K460-EG         180 MHz            11.8            20.2            1MB/1MB
K460-XP         180 MHz            11.8            20.2            1MB/1MB

For more information about the PA-8000, please see the HP Support Desk web page (URL above) or visit the HP Computing Technologies WWW Page at "http://www.hp.com/wsg/strategies/strategy.html" .

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