MOS Reliability

Long-Term Reliability of MOS Oxides on Silicon Carbide

Michelle Mathur Maranowski, Pramod Gosavi, J. A. Cooper, Jr., and M. R. Melloch

Supported by the Ballisic Missile Defense Organization, administered by the Office of Naval Research

The high breakdown field of SiC (8 - 10x higher than Si) makes it an attractive material for high-voltage power switching devices. Since SiC has a high-quality thermal oxide (SiO₂), it is possible to fabricate MOS-based power switching devices having extremely high input impedance. The limiting factor in these devices is likely to be the reliability of the thermally grown oxide. From Gauss' law, the field in the oxide is approximately 2.5 times greater than the peak field in the SiC. Since the peak field in SiC can be almost 10x higher than in Si, the fields in the oxide on SiC will tend to be 10x higher than the oxide fields in silicon devices. At these fields, the mean-time-before-failure (MTBF) of the oxide can be significantly reduced. In order to achieve acceptable device reliability, the maximum field in the oxide may need to be limited. If this occurs, the high-field capability of SiC cannot be fully utilized.

The goal of this project is to investigate the reliability of presently-available thermal oxides on SiC and to develop processing techniques to improve the reliability. The reliability is evaluated using an MOS capacitor structure. Oxides are thermally grown by wet oxidation at 1150 C using a baseline procedure that yields interface state densities around 1.5x10¹¹ eV^-1 cm^-2 and fixed oxide charge densities around 9x10¹¹ cm^-2 (see MOS Interface Research). Polysilicon gates are deposited by LPCVD and doped using a spin-on-dopant. The dopant is subsequently driven-in at 900 C. Aluminum is thermally evaporated on the polysilicon, and the aluminum and polysilicon are patterned into MOS capacitors by wet etching. Platinum is deposited as a non-annealed back contact.

The experiment is designed to create a valid statistical set, that is, to ensure that the measured capacitors are subjected to identical conditions. The system stresses 40 capacitors on a single die simultaneously. Failed devices are removed without interrupting the stress applied to the other capacitors. The measurement apparatus [1], shown in Fig. 1, consists of a Micromanipulator dark box with heated stage, a resistor box, a DC voltage source, an HP computer, an HP 3488 switch matrix, and an HP 3456 digital voltmeter. Forty 50-kOhm resistors are placed in series with the 40 capacitors to limit the current and allow breakdown to be detected. The computer sequentially closes each switch, takes a voltage reading, records the time, then opens the switch. The voltage is divided by 50 kOhm to calculate the current. If the current is greater than 10 µA, the capacitor is considered failed and is excluded from further measurement. The test continues until all 40 capacitors have failed.

Figure 1. Experimental apparatus for automatically recording the time-to-failure of 40 MOS capacitors under high-field and high-temperature stress conditions.

Statistical data sets consist of the time-to-failure distribution of 40 capacitors at a specific electric field and temperature. Figure 2 shows a log-normal plot of the failure distributions at three stress fields for n-type 6H-SiC MOS capacitors measured at 145 C [1]. Note that the failure distributions are bi-modal: the first 50 - 60% of the samples fail gradually over an extended period of time, and the last 40 - 50% fail in a tighter distribution over a shorter period of time. The initial portion of the distribution represents "extrinsic" failures, attributed to devices that contain weak points in the oxides. Note that these are not defective devices, since all 40 capacitors test good at room temperature and moderate fields. The later part of the distribution corresponds to "intrinsic" failures, and is considered indicative of the intrinsic quality of the oxide.

Figure 2. Failure distributions for n-type 6H-SiC MOS capacitors at 145 C. One die of 40 MOS capacitors is tested at each field: 7.0, 7.5, and 8.0 MV/cm.

Measurements similar to that of Fig. 2 are conducted at 240 and 305 C, and similar failure distributions are obtained. The 50% failure times at each temperature are plotted against oxide field in Fig. 3 [1]. If the data is extrapolated to lower fields, we find that the mean-time-before-failure is greater than 10,000 years at 145 C and an oxide field of 3 MV/cm. Such extrapolations are not strictly justified, since different failure mechanisms may dominate at lower fields. However, based on Fowler-Nordheim measurements, we believe that the 145 C data can be safely extrapolated to 5 MV/cm. It is worth noting that the MTBF of oxides on p-type SiC are longer than on n-type, so the results shown in Fig. 3 may be regarded as "worst-case" results.

Figure 3. Mean-time-before-failure for n-type 6H-SiC MOS capacitors as a function of field at three temperatures.

The data in Fig. 3 suggests that the reliability of oxides on 6H-SiC will be satisfactory for long-term operation, provided the oxide field is kept below 3 - 4 MV/cm. However, a great deal of investigation remains to be done. A comparable set of data needs to be obtained on 4H-SiC, since this polytype is likely to be used in power switching devices. In addition, the effect on reliability of several recent processing innovations, such as low-temperature re-oxidation anneals, still needs to be determined.

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[1] M. M. Maranowski and J. A. Cooper, Jr., "Time-Dependent-Dielectric-Breakdown Measurements of Thermal Oxides on N-Type 6H-SiC,"IEEE Trans. on Electron Devices, 46, 520 (1999).

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